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【NVIDIA英伟达】硬件类岗位招聘
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楼主 发表于  2017/12/17 22:10:18    编 辑   

【NVIDIA英伟达】现开放ASIC PD/Verification/SOC/Power Engineer硬件类岗位招聘,职位信息请参见下表。
意向沟通 / 申请岗位 请发送中英文简历到heatherl@nvidia.com,收到简历我们将即刻与您联系。感谢!

Physical Design Engineer
ASIC Physical Design team 的主要工作内容分为两大部分,芯片物理整合和时序分析及其修正。
这个工作有两个突出的特点:
1. 接触面广。 有机会接触了解到从前端设计到后端流片的各个环节。
2. 有专长的知识,物理整合和时序分析需要对综合,网表质量检查,形式验证,芯片整体的物理需求有深入的了解。同时对静态时序分析,时钟结构的调整和优化,功耗的优化有深入的了解。
Requirement:
1. BSEE, MSEE is preferred
2. Project experience in IC design implementation
3. Courses taken in circuit design, digital design
4. Hand-on experience in EDA software from Synopsys (DC/PT/Formality), Cadence (LEC) is preferred
5. Ways to stand out from the crowd:
6. Proficient user of Perl or TCL is preferred
7. Excellent English communication skill

ASIC Design/Verification Engineer
ASIC Design/Verification team的主要工作内容包括RTL设计,合成,时序和芯片启动单元级和系统级验证以及芯片级集成。
Requirement:
1. BS / MS in electrical / computer engineering and related.
2. Familiar with verification methodology, tools and flow
3. Understand frontend ASIC design flow including RTL design, synthesis and timing analysis
4. Excellent analytical and problem solving skills

SOC Design Engineer
负责padring设计的各方面工作,包括维护现有的padring RTL生成流程,为padring设计团队和DFT团队提供支持,创建,实施和验证新一代padring,与其他团队进行跨团队合作等。
Requirement:
1. BS or MS (preferred) in EE/CE/CS.
2. Strong coding skill skin Perl, TCL, C /C++
3. Understand ASIC design/implementation flow
4. Proficient in DFT knowledges such as JTAG, BDSL, IEEE1500, etc.
5. Fluent English (both written and spoken) and excellent communication skills to 
6. Interface with many groups and build consensus
7. Good team work spirit, easy to cooperate with team members
8. Prior experience in floor planning and board level is a plus.
9. Prior experience in implementing System-On-Chip is a plus
10. Prior experience in RTL build and design automation is a plus

ASIC Power Engineer
硬件功耗团队负责研究电力支出和工作负荷效率,策划和设计电力优化的架构。它与design工作密切挂钩,能全面了解chip生产过程中从前端到后端的整个过程,对芯片设计的贡献更直观,分析和优化芯片功耗方案,评估新的低功耗技术,提高芯片功效。
Requirement:
1. MSEE/MSCS postgraduate.
2. Experience in ASIC design/verification, low power knowledge is a strong plus.
3. Must be familiar with at least one of the programming languages, C/C++ (preferred), Python, and Perl.
4. Excellent English writing/speaking skills are desired.
5. Good communication skills.

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